Akrometrix Interface Analysis

Surface-mount components warp during the reflow process, and the area where they attach also changes shape during assembly. This interface between components is where solder, paste, and gaps created due to thermal expansion combine to create 100% good products, or defects such as Head-on-Pillow, Shorts, and Opens. Fully understanding that critical interface between surfaces is more important than ever.

While standard Akrometrix software allowed the analysis of an individual surface, such as a PCB or BGA, Interface Analysis is new software that enables 3D, 2D, and statistical review of a complete interface. Users can now visualize and quantify exactly how two surfaces will mate together. By combining this feature with the ability to measure surfaces at each temperature point during reflow, solder joint formation or failure can be predicted much more easily.

Interface Analysis works with data supplied by any of the 200+ TherMoiré systems in use throughout the worldwide Electronics supply chain today. Introducing unique features such as Pass/Warning/Fail maps, and various gap and surface gauge information, Interface Analysis lets users see what is happening between two dynamic surfaces through the reflow process. Applications include SMT Assembly Planning and Troubleshooting, Failure Analysis, Supplier Qualification and Comparison, Ongoing SPC, Package Design, and FEA Modeling Validation

Figure 1. An image from Akrometrix Interface Analysis showing a statistical combination of measured top and bottom surfaces and a calculated pass/warning/fail map between them, highlighting 'extreme gap' areas

Figure 2. Interface Analysis Main User Interface


Two Important Application Areas

Package-on-Package Design and Assembly


  • Many Technical Papers describe warpage as critical to PoP design
  • Thinner Devices lead to thinner PoP layers
  • Warpage of Top and Bottom 'Attach' Surfaces is Critical
  • Warpage at each point in attach area must be checked
  • Interface Analysis allows 'easy' shape comparison at all temperatures
  • User can set Limits and 'see' problem areas in PWF Maps
  • More Layers (such as with PoPi) make warpage more important


Package-to-PCB Design and Assembly

From Head-in-Pillow defect IPC technical paper:

"One of the major contributors to the supplier issues is the integrity of the BGA component.The main component integrity issue that contributes to head-in-pillow defects is component warpage during the product manufacturing reflow process. If the component begins to warp during the soldering process, the component spheres will separate from the solder paste and not wet to the bulk solder. Component package design, materials and integrity all contribute to the potential warpage of the part. Internal verification testing should be completed to understand the potential component warpage prior to the implementation of a new package into the manufacturing process."

Reasons Dual-Surface Analysis is becoming necessary:

  • Thinner PCB Substrates
  • Coreless PCB Substrates
  • Multi-Package to Strip Assembly
  • Finer Pitch Packages
  • QFN volume increasing (uses no solder balls)
  • PoP-to-PCB Assembly
  • Faster Design-to-Assembly Cycles
  • More EMS providers in Supply Chains
  • More Component/PCB Suppliers in Supply Chains


Figure 3. Interface Analysis Applications